Lead Engineer, PCIe

Role Overview

• Own PCIe bring-up on Linux
• Root Complex/Endpoint enablement, performance, and AVV from FPGA to first silicon.
• Enable and maintain PCIe Root Complex and/or Endpoint functionality on a 64-bit RISC‑V MPU Linux platform.
• Bring up the PCIe controller, PHY/SerDes integration, clocks/resets, link training (LTSSM), and interrupt routing.
• Drive kernel/BSP enablement: Device Tree bindings, address translation/windows, IOMMU interactions (where applicable), and power management (ASPM, suspend/resume).
• Own PCIe functionality in Linux: enumeration, configuration space, BAR programming, DMA engines, and interrupt mechanisms (legacy/MSI/MSI‑X).
• Enable and validate reliability features: link up/down recovery, error handling (AER), timeouts, and robustness across hot reset and stress scenarios.
• Deliver PCIe-ready SDK releases: integration, regression validation, and developer-facing documentation/debug guides (e.g., lspci workflows, link/debug playbooks).
• Create test plans and automation to validate PCIe functionality, performance, and interoperability on FPGA/emulation and first silicon.
• Partner with architects, RTL/SerDes/PHY, board, and platform teams to define requirements, de-risk schedules, and land PCIe features.
• Provide bring-up and validation feedback that influences PCIe architecture decisions (debug hooks/observability, compliance testability, error reporting, and recovery behavior).
• Support early adopters and upstream fixes when appropriate (kernel, Device Tree, PCI subsystem/endpoint framework).

Requirements

• B.E./B.Tech or M.E./M.Tech in Computer Engineering, Electrical Engineering, or a related field.
• Strong experience with minimum 8-12 years in Embedded Linux platform/BSP and device-driver development.
• Expert-level C programming; comfortable reading and modifying kernel, driver, and low-level firmware code.
• Strong Linux internals knowledge: boot flow, memory/interrupt subsystems, concurrency, and performance debugging.
• Hands-on SoC/platform bring-up experience, including high-speed I/O enablement and ownership mindset for subsystem quality.
• Hands-on with U‑Boot, Linux kernel, Device Tree, and Yocto/OpenEmbedded; experience integrating and validating PCIe in BSP/SDK releases.
• Strong debugging skills with GDB and at least one of OpenOCD/JTAG, Lauterbach, or similar tools; able to debug complex HW/SW interactions.
• Experience working on FPGA, emulation, or early-silicon platforms for bring-up/validation.

Tech Stack

• Linux

Benefits

• Build a RISC‑V MPU platform from the ground up and see it shipped in real products.
• End-to-end ownership across pre-silicon → FPGA → first silicon → production SDK releases.
• Work closely with CPU architects and SoC teams; your data drives decisions.
• Deep technical work, strong peer group, and long-term growth on a strategic platform.