MAPLE Accelerators Systems Engineer

ANDREW, an Amphenol company, is seeking a MAPLE Accelerators Systems Engineer to provide technical expertise in the development and troubleshooting of MAPLE hardware accelerators and embedded firmware. The role involves collaboration with various engineering teams to optimize 4G processing and requires hands-on development and debugging skills.

Responsibilities:

• Providing hands-on development and debug support for B4860 MAPLE hardware accelerators
• Supporting uplink (UL) MAPLE modules and MAPLE job scheduling
• Developing, modifying, and troubleshooting MAPLE RISC micro-code, including state machines and DMA coordination between master and slave components
• Developing and maintaining embedded firmware to control MAPLE accelerators
• Writing and supporting device drivers for MAPLE accelerators (DEPE, EQPE, FTPE, TVPE, PUPE, CRCPE) on SC3900 DSP cores
• Configuring and troubleshooting shared memory subsystems and cache coherency between MAPLE accelerators and SC3900 DSP cores
• Debugging MAPLE hangs caused by memory corruption, coherency issues, or performance bottlenecks
• Supporting B4860 exception handling, system configuration, and MMU configuration for both SC3900 DSP cores and MAPLE accelerators
• Configuring and debugging MAPLE AXI master and slave interfaces to/from the SoC
• Supporting CoreNet Coherency Module configuration and resolving system-level issues
• Working with MAPLE HW scheduler, PIC, and SRAM switch fabric on B4860 platforms

Requirements:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience
• Proven hands-on experience with Freescale B4860 MAPLE hardware and/or MAPLE software
• Prior experience working on MAPLE HW and/or MAPLE SW is required
• Strong experience with UL MAPLE modules (must-have)
• Experience developing RISC-based embedded firmware for hardware accelerators
• Experience writing low-level device drivers for DSP-based systems
• Strong understanding of DMA, MMU configuration, cache coherency, and shared memory architectures
• Demonstrated ability to debug complex hardware/software interaction issues in real-time or near-real-time systems
• Have experience with SC3900 DSP processing
• Understand Host-to-MAPLE interfaces, including job preparation, MAPLE buffer descriptors, and SDOS APIs
• Have worked with EDF / Embedded Data Flows in MAPLE engines
• Have experience configuring high- and low-priority buffer descriptor rings
• Have hands-on experience with B4860 Datapath Acceleration Architecture (DPAA), including QMAN, BMAN, and FMAN