
Job Title: UFS Engineer (SoC / FPGA / Emulation)
Location: San Jose, CA
Job Summary
We are seeking a UFS Engineer with strong experience in SoC verification, hardware emulation, and pre/post silicon validation. The ideal candidate will work on UFS host IP validation, firmware-driven testing, and performance optimization within complex SoC environments.
Key Responsibilities
Develop and execute verification test plans for UFS Host IP within SoC environments
Perform validation using emulation platforms such as Zebu, Veloce, and HAPS
Debug failures using waveform viewers and log analysis to isolate protocol and interconnect issues
Capture and analyze waveforms to root-cause design and integration problems
Create pre-silicon and post-silicon validation test content in C
Enable firmware-driven validation and integrate driver-level software with hardware
Validate power, performance, and throughput targets (UFS 3.x / 4.x / 5.x)
Develop performance models to optimize storage subsystem throughput and latency
Validate interactions between UFS IP and SoC components such as:
Southbridge
Memory controllers
Bus interconnects (AXI / AHB)
Identify and debug RTL issues in pre-silicon environments
Ensure UFS IP compliance with features including:
Data encryption
Power management
High-speed data transfer (M-PHY / UniPro)
Required Skills & Experience
2 7 years of experience in SoC validation or verification
Strong understanding of UFS standards and Host Controller Interface
Hands-on experience with Zebu / Veloce / FPGA prototyping
Experience debugging RTL using waveform viewers (e.g., Verdi)
Strong scripting skills in Python, Perl, or TCL
Experience validating SoC interconnects (AXI, AHB)
Experience creating and executing C-based validation tests
Knowledge of pre-silicon and post-silicon validation flows
Preferred Skills
Experience with SystemC / TLM performance modeling
Experience with Bare-metal or Linux driver development
Firmware development experience
Experience with peripheral protocols and storage subsystems