Cornelis Networks is building the future of AI and HPC networking with an AI-first approach to silicon and software development. They are seeking Mid-Level and Senior ASIC Verification Engineers to verify world-class SoCs for high performance computing and AI interconnect solutions. The role involves participating in the development of UVM environments and executing formal verification of RTL.
Responsibilities:
- Participate in development of UVM environments to verify RTL at block, unit, and SoC levels
- Write and execute tests according to verification plans
- Instrument TB for functional and code coverage; collect and analyze coverage results
- Execute formal verification of block level RTL
- Participate in post-silicon verification
Requirements:
- Must be able to read, write and speak English at a level of professional working proficiency
- 3 + years' post-college experience in verification
- 3 + years' post-college experience in one or more scripting languages (TCL, Python, Perl, Shell-scripting)
- 3 + years' post-college experience validating complex SoCs that include multiple clock and reset domains
- Experience in UVM based test bench development
- B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering
- M.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering
- Track record of first-pass success in ASIC and Systems