Allocate team resources across multiple projects and prioritize deliverables
In-depth technical leadership on DFT processes and methods
Work with senior staff on enhancements to infrastructure and methodology
Manage test pattern development and post-silicon ATE debug
Recruit additional DFT staff engineers and manage contract resources
Monitor the team performance and conduct annual reviews
Work with chip leads to estimate DFT portion of schedules
Requirements
Bachelor’s or master’s degree majoring in Computer Science, Computer Engineering, or Electronic or Electrical Engineering
15 or more years of industry experience
Minimum five years of experience with managing direct reports
Experience with the latest ASIC DFT methodologies (including JTAG, boundary scan, EDT scan ATPG, MBIST/MBISR), tools and scripting/programming languages
Benefits
Medical, dental and vision insurance
401(k) plan with a Cisco matching contribution
Paid parental leave
Short and long-term disability coverage
Basic life insurance
10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday
Paid year-end holiday shutdown
4 paid days off for personal wellness
16 days of paid vacation time accrued for non-exempt employees
Flexible vacation time off program for exempt employees
80 hours of sick time off provided on hire date and each January 1st
Additional paid time away for critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer