Hardware Design Engineer (2nm/3nm/5nm)

Dexian is a leading provider of staffing, IT, and workforce solutions with over 12,000 employees and 70 locations worldwide. The company is seeking a highly skilled Layout Engineer to support the development of high-performance analog and mixed-signal integrated circuits, focusing on advanced CMOS technologies for data center processors.

Responsibilities:

• Execute full-custom layout for analog and mixed-signal blocks including ADCs, DACs, PLLs, LDOs, comparators, and temperature sensors
• Collaborate with circuit designers to optimize layout for performance, area, and power
• Perform Floorplanning, block-level routing, and macro-level assembly
• Conduct physical verification using tools like Cadence Virtuoso, Synopsys Custom Compiler, and Calibre
• Address DRC/LVS, EMIR, and DFM issues and ensure layout meets manufacturing and reliability standards
• Support tape-out activities and post-layout simulation reviews
• Document layout strategies and contribute to design reviews

Requirements:

• Analog circuit layout in advanced CMOS (FinFET/gate-all-around, 2-3nm) – Minimum 4 years
• Proficiency with layout tools (Cadence Virtuoso, Calibre) – Minimum 4 years
• Understanding of analog layout techniques (matching, shielding, reliability, parasitic optimization) – Minimum 4 years